//
//  ebi.c
//  NMEA
//
//  Created by Hans Johnson on 2/5/2014.
//
//  EBI configuration utilities
//

#include <avr/io.h>
#include "avr_compiler.h"
#include "ebi.h"


// Function that initializes the EBI setup for the atmel
void ebiInit ( void )
{
    /* Configure the port configuration This puts ADDR(8:15) on Port F, and the chip selects on the upper nibble of PORT_H */
    PORTCFG.EBIOUT = PORTCFG_EBIADROUT_PF_gc | PORTCFG_EBICSOUT_PH_gc;
    
    /*
     * Configure EBI for no ALE and 4 port mode
     */
    EBI.CTRL = EBI_IFMODE_4PORT_gc | EBI_SRMODE_NOALE_gc;
    
    /*
     * Confgure the LCD ChipSelect
     */
    EBI.CS0.CTRLA = EBI_CS_ASPACE_256B_gc | EBI_CS_MODE_SRAM_gc; // Set 256 Bytes size and SRAM mode
    EBI.CS0.CTRLB = EBI_CS_SRWS_7CLK_gc; // Set for 7 wait states
    EBI.CS0.BASEADDR = (LCD_BASE_ADDR>>8); // Set the base address... but we actually just set the top byte
    
    /*
     * Configure the 16550 ChipSelect
     */
    EBI.CS1.CTRLA = EBI_CS_ASPACE_256B_gc | EBI_CS_MODE_SRAM_gc; // Set 256 Bytes size and SRAM mode
    EBI.CS1.CTRLB = EBI_CS_SRWS_1CLK_gc; // 1 WaitState for the UARTS
    EBI.CS1.BASEADDR = (UART_BASE_ADDR>>8);
    
    /*
     * Configure the main SRAM
     */
    EBI.CS2.CTRLA = EBI_CS_ASPACE_128KB_gc | EBI_CS_MODE_SRAM_gc; // Set 128KB, and SRAM mode
    EBI.CS2.CTRLB = EBI_CS_SRWS_0CLK_gc; // 0 Wait States
    EBI.CS2.BASEADDR = SRAM_BASE_ADDR; // Overlays main memory
}
